Previously, concatenation of tensors along dimension 1 was optimized using DMA, but concatenation along other dimensions or with various dense layouts relied on slower scalar copy paths.

The existing implementation only supported DMA-based concatenation for dim-1 contiguous tensors, causing inefficient CPU-bound copies for other concat dimensions and layouts.

Introduced shared strided DMA copy functions enabling concatenation along any dimension for tensors dense in dim 0, moving common DMA utilities to a shared header and achieving significant runtime reductions on Snapdragon 8 Elite Gen5.

Leveraging strided DMA for multi-dimensional tensor operations can drastically improve performance on specialized hardware, and consolidating shared functionality simplifies maintenance and future enhancements.